EEEN202 (2023) - Digital Electronics and Microprocessors
An introduction to the design and construction of digital electronic instruments. Following a review of binary arithmetic and Boolean algebra, the course will focus on the design of digital circuits using both combinatorial and sequential logic. Further work will study microprocessor architectures, programming and interfacing and the conversions of digital and analogue signals.
Course learning objectives
Students who pass this course should be able to:
- Use the understanding of the basic logic operations and logic circuit elements to create digital circuits. (BE graduate attribute 3(a,b))
- Design and construct both combinatorial and synchronous sequential circuits. (BE graduate attribute 3(b,c))
- Explain the basic architecture of a microcontroller. (BE graduate attribute 3(a))
- Program a microprocessor in assembly language to implement an embedded system. ((BE graduate attribute 3(a, b))
This course is designed for in-person study, and students are strongly recommended to attend lectures, tutorials and labs on campus. In particular, some assessment items or practical hands-on labs will require in-person attendance, although exceptions can be made under special circumstances.
Queries about any such exceptions can be sent to email@example.com.
Withdrawal from Course
Withdrawal dates and process:
Dr Gideon Gouws (Coordinator)
- 04 463 5952
- AM 225 Alan Macdiarmid Building, Gate 7, Kelburn Parade, Kelburn
- 04 463 6523
- CO 251 Cotton Building (All Blocks), Gate 7, Kelburn Parade, Kelburn
The course will be taught through lectures and tutorials and with a strong focus on laboratory design skills.
Dates (trimester, teaching & break dates)
- Teaching: 27 February 2023 - 02 June 2023
- Break: 10 April 2023 - 23 April 2023
- Study period: 05 June 2023 - 08 June 2023
- Exam period: 09 June 2023 - 24 June 2023
Set Texts and Recommended Readings
There are no required texts for this offering.
Mandatory Course Requirements
There are no mandatory course requirements for this course.
If you believe that exceptional circumstances may prevent you from meeting the mandatory course requirements, contact the Course Coordinator for advice as soon as possible.
This course is 100% internally assessed.
|Assessment Item||Due Date or Test Date||CLO(s)||Percentage|
|Two assignments||TBC||CLO: 1,2,3||10%|
|Laboratory work (3 hrs per week)||TBC||CLO: 2,3,4||40%|
|Two Tests (90 minutes duration each)||TBC||CLO: 1,2,3,4||50%|
All work is due in on the due date. Marks will be deducted at a rate of 10% of the full mark for each working day late. Work will not be marked if more than 1 week late.
Extensions must be requested in writing (email) and will only be given in exceptional circumstances, and if agreed before the due date. No late work will be accepted after the model solutions to any piece of assessment have been distributed to the class.
Submission & Return
All submissions are to be electronic and via the ECS online submission system.
The student workload for this course is 150 hours.
The following material will be covered during EEEN 202:
Overview of logic gates, combinatorial logic, Boolean algebra, simplification, K-maps
Sequential logic, Flip-Flops, Counters, asynchronous and synchronous,
Registers, Arithmetic Circuits
Design of synchronous counters, state machines
Hardware Description Language
Microprocessor architecture and operation based on 8051,
Timing, polling and interrupts
Analog to digital conversion,
Communication of Additional Information
Course materials and other information will be available from https://ecs.wgtn.ac.nz/Courses/EEEN202_2023T1/. Students should check there regularly.
Links to General Course Information
- Academic Integrity and Plagiarism: https://www.wgtn.ac.nz/students/support/student-interest-and-conflict-resolution/academic-integrity
- Academic Progress: https://www.wgtn.ac.nz/students/study/progress/academic-progess (including restrictions and non-engagement)
- Dates and deadlines: https://www.wgtn.ac.nz/students/study/dates
- Grades: https://www.wgtn.ac.nz/students/study/progress/grades
- Special passes: Refer to the Assessment Handbook, at https://www.wgtn.ac.nz/documents/policy/staff-policy/assessment-handbook.pdf
- Statutes and policies, e.g. Student Conduct Statute: https://www.wgtn.ac.nz/about/governance/strategy
- Student support: https://www.wgtn.ac.nz/students/support
- Students with disabilities: https://www.wgtn.ac.nz/st_services/disability/
- Student Charter: https://www.wgtn.ac.nz/learning-teaching/learning-partnerships/student-charter
- Student Feedback on University courses may be found at: http://www.cad.vuw.ac.nz/feedback/feedback_display.php
- Terms and Conditions: https://www.wgtn.ac.nz/study/apply-enrol/terms-conditions/student-contract
- Turnitin: http://www.cad.vuw.ac.nz/wiki/index.php/Turnitin
- University structure: https://www.wgtn.ac.nz/about/governance/structure
- The Use of Te Reo Māori for Assessment Policy:
Victoria University values te reo Māori. Students who wish to submit any of their assessments in te reo Māori must refer to The Use of Te Reo Māori for Assessment Policy
He mea nui te reo Māori ki te Whare Wānanga o te Ūpoko o te Ika. Ki te pīrangi koe ki te tuhituhi i ō aro matawai i roto i te reo Māori, tēnā me mātua whakapā atu ki te kaupapa here, The Use of Te Reo Māori for Assessment Policy
- VUWSA: http://www.vuwsa.org.nz
Offering CRN: 33054
Prerequisites: one of (COMP 102, 112, ENGR 101, 121, MATH 161)
Restrictions: ECEN 202
Duration: 27 February 2023 - 25 June 2023
Starts: Trimester 1